neutral-labs-luna

Neutral Labs Luna

Logic, Unbound. Meet Luna. The first serious Lunetta synthesizer.

42 HP Eurorack module

Luna is a patchable Lunetta-style synthesizer that uses exposed CMOS logic to create timbres and sequences, then shapes the results with three analog low-pass-gate channels and two serial effects slots.

Features

  • Five square-wave oscillators feed patchable NOT, XOR and AND gates, counters, shift registers and a multiplexer.
  • Three touchpads generate logic signals during normal operation.
  • Three analog audio channels combine gain, tilt EQ and low-pass gates with adjustable release and switchable sustain or trigger behavior.
  • Thirteen effects can be assigned to two serial effect slots.
  • Two pitch sequencers provide up to 64 steps and can advance from a patched clock or MIDI.
  • Normalled touchpad-to-LPG connections allow immediate playing; patching an LPG gate input overrides its internal source.
  • Oscillators 3–5 are normalled to the three LPG audio inputs, with each normalization removed when that input is patched.
  • Logic outputs are DC-coupled 0–5 V and short-circuit protected.
  • Remember: gold-ringed sockets are outputs; avoid patching one output to another even though the outputs are protected.

Controls & Jacks (60)

  • LPG Channel 2 Tilt— Balances Channel 2's tilt EQ from boosted lows/attenuated highs counterclockwise to attenuated lows/boosted highs clockwise.
  • XOR 1 Output— DC-coupled 0–5 V output that is high only when exactly one XOR 1 input is high.
  • LPG Channel 2 Release— Sets the release time of Channel 2's low-pass-gate envelope.
  • Ring Counter Upper Output— Upper ring counter output.
  • Binary Counter Upper Middle Output— Upper Middle binary counter output.
  • Shift Register 2 Upper Output— Upper parallel output of shift register 2.
  • Binary Counter Lower Output— Lower binary counter output.
  • Touchpad 3 Output— Outputs 0 V or 5 V according to Touchpad 3 or its configured MIDI-clock/MIDI-note source.
  • LPG Channel 1 Release— Sets the release time of Channel 1's low-pass-gate envelope.
  • NOT 1 Input— Logic input for the first inverter; accepts 0–5 V logic with protection across the Eurorack voltage range.
  • Multiplexer Data Input 0— Multiplexer data input selected when S1:S0 equals 00.
  • Multiplexer Select Input 1— Most-significant multiplexer channel-select input.
  • Multiplexer Data Input 1— Multiplexer data input selected when S1:S0 equals 01.
  • Binary Counter Upper Output— Upper binary counter output.
  • NOT 1 Output— DC-coupled 0–5 V output that is high when NOT 1 Input is low and low when its input is high.
  • Oscillator 1 Frequency— Tunes Oscillator 1; tuning is quantized to the configured scale by default and may instead be driven by its sequencer or MIDI.
  • Shift Register 1 Clock Input— Schmitt-trigger clock input; each rising edge shifts SR1 and samples its data input.
  • Ring Counter Lower Output— Lower ring counter output.
  • LPG Channel 3 Volume— Sets the input gain of low-pass-gate Channel 3.
  • NOT 2 Input— Logic input for the second inverter; accepts 0–5 V logic with protection across the Eurorack voltage range.
  • NOT 2 Output— DC-coupled 0–5 V output that is high when NOT 2 Input is low and low when its input is high.
  • Shift Register 1 Reset Input— Rising-edge reset input that clears all SR1 stages low.
  • LPG Channel 1 Gate Input— Opens Channel 1's low-pass gate; accepts a gate or continuous 0–5 V level and overrides the internal touchpad/configured source when patched
  • Binary Counter Reset Input— Rising-edge reset input that returns the binary counter to zero.
  • CV2 Input— Control-voltage input routed by default to Oscillator 2 pitch.
  • Shift Register 1 Upper Output— Upper parallel output of shift register 1.
  • Oscillator 5 Output— Wide-range DC-coupled 0–5 V square-wave output from Oscillator 5.
  • AND 1 Input A— First logic input of AND gate 1.
  • Shift Register 1 Data Input— Serial logic-data input sampled into SR1 on a rising clock edge.
  • Shift Register 2 Lower Middle Output— Lower Middle parallel output of shift register 2.
  • Multiplexer Select Input 0— Least-significant multiplexer channel-select input.
  • Shift Register 2 Clock Input— Schmitt-trigger clock input; each rising edge shifts SR2 and samples its data input.
  • XOR 2 Output— DC-coupled 0–5 V output that is high only when exactly one XOR 2 input is high.
  • Touchpad 1— Generates a high logic state while touched when the display is in standby.
  • LPG Channel 1 Mix Input— AC-coupled audio input for Channel 1; normalled from Oscillator 3 until a cable is inserted.
  • Shift Register 2 Reset Input— Rising-edge reset input that clears all SR2 stages low.
  • Ring Counter Reset Input— Rising-edge reset input that returns the ring counter to its first state.
  • LPG Channel 3 Release— Sets the release time of Channel 3's low-pass-gate envelope.
  • Multiplexer Data Input 3— Multiplexer data input selected when S1:S0 equals 11.
  • Shift Register 1 Lower Middle Output— Lower Middle parallel output of shift register 1.
  • Multiplexer Data Input 2— Multiplexer data input selected when S1:S0 equals 10.
  • Oscillator 1 Output— DC-coupled 0–5 V square-wave output from Oscillator 1, usable at logic, modulation, or audio rates.
  • Shift Register 1 Lower Output— Lower parallel output of shift register 1.
  • Shift Register 2 Upper Middle Output— Upper Middle parallel output of shift register 2.
  • Ring Counter Upper Middle Output— Upper Middle ring counter output.
  • LPG Channel 2 Volume— Sets the input gain of low-pass-gate Channel 2.
  • Shift Register 2 Data Input— Serial logic-data input sampled into SR2 on a rising clock edge.
  • AND 2 Output— DC-coupled 0–5 V output that is high only when both AND 2 inputs are high.
  • XOR 2 Input A— First logic input of XOR gate 2.
  • LPG Channel 1 Tilt— Balances Channel 1's tilt EQ from boosted lows/attenuated highs counterclockwise to attenuated lows/boosted highs clockwise.
  • Audio Output— Headphone-compatible, AC-coupled mono output carrying the three LPG channels after the two serial effects slots.
  • Shift Register 2 Lower Output— Lower parallel output of shift register 2.
  • Multiplexer Output— Outputs whichever of D0–D3 is selected by the binary value on S1 and S0.
  • Oscillator 3 Output— Wide-range DC-coupled 0–5 V square-wave output from Oscillator 3.
  • XOR 1 Input B— Second logic input of XOR gate 1.
  • Binary Counter Clock Input— Schmitt-trigger clock input; each rising edge increments the four-bit binary counter.
  • Oscillator 4 Output— Wide-range DC-coupled 0–5 V square-wave output from Oscillator 4.
  • LPG Channel 3 Mix Input— AC-coupled audio input for Channel 3; normalled from Oscillator 5 until a cable is inserted.
  • Ring Counter Clock Input— Schmitt-trigger clock input; each rising edge advances the active stage of the five-step ring counter.
  • Oscillator 2 Frequency— Tunes Oscillator 2; tuning is quantized to the configured scale by default and may instead be driven by its sequencer or MIDI.

How-To Guides

  • Select an Effect
  • Set an Individual Effect Mix
  • Record a Pitch Sequence
  • Clock a Sequence from CV
  • Create XOR Harmonics
  • Build a Counter and Shift-Register Pattern
  • Create a Multiplexer Complex Oscillator

Explore the interactive Luna panel on BleepDex — tap any control to learn what it does.

595713e