xaoc-devices-erfurt

XAOC Devices Erfurt

8-bit binary counter, phase accumulator, and frequency divider

6 HP Eurorack module

Erfurt is a bi-directional 8-bit binary phase accumulator, digital counter, and clock frequency divider that is part of the Xaoc Devices Leibniz Binary Subsystem. It counts up or down in programmable steps, outputting 8 binary gate signals that can serve as clock divisions, rhythmic triggers, phase sources for wavetable scanning, or CV staircase generators. Its CMOS-based design allows operation at audio and super-audio rates without aliasing, giving it a uniquely mathematical yet musical character.

Features

  • 8-bit bi-directional binary counter with 256-step modulo wrap
  • Phase accumulator: adds incoming Leibniz data value to internal register each clock cycle
  • 8 binary gate outputs (5V logic) with corresponding yellow LEDs
  • Simultaneous increment and decrement clock inputs; increment has higher priority on simultaneous edges
  • Manual increment and decrement push buttons (default step size 1)
  • Simultaneous press of both buttons resets counter state to zero
  • Dedicated reset clock input
  • Leibniz Binary Subsystem compatible with 10-pin ribbon data in and out headers
  • Normalization on Leibniz in header enforces value of 1 (binary 00000001) when unplugged, enabling classic binary frequency division
  • Leibniz out taps adder output before register write, allowing real-time offset of incoming data
  • Internal near-2MHz HF clock source selectable via rear jumper (CLK SRC INT/EXT)
  • Leibniz clock on/off switch and three-position pre-scaler (1:256, 1:1, 1:64K)

Controls & Jacks (16)

  • Decrement— Manual decrement button. Decreases the 8-bit counter by one step.
  • Clock Incr. Input— Clock input for incrementing. Each trigger advances the counter by one.
  • Increment— Manual increment button. Advances the 8-bit counter by one step.
  • Bit LEDs— 8 LEDs showing the current binary state of the counter.
  • Clock Decr. Input— Clock input for decrementing. Each trigger decreases the counter by one.
  • Reset Input— Reset input. Resets the counter to zero.
  • LBZ CLK Divider— Switch to set the Leibniz bus clock divider ratio.
  • LBZ CLK Enable— Switch to enable or disable the Leibniz bus clock.
  • Bit 7 Output— Gate/trigger output for bit 7 (MSB). High when bit 7 is set.
  • Bit 6 Output— Gate/trigger output for bit 6. High when bit 6 is set.
  • Bit 5 Output— Gate/trigger output for bit 5. High when bit 5 is set.
  • Bit 4 Output— Gate/trigger output for bit 4. High when bit 4 is set.
  • Bit 3 Output— Gate/trigger output for bit 3. High when bit 3 is set.
  • Bit 2 Output— Gate/trigger output for bit 2. High when bit 2 is set.
  • Bit 1 Output— Gate/trigger output for bit 1. High when bit 1 is set.
  • Bit 0 Output— Gate/trigger output for bit 0 (LSB). High when bit 0 is set.

How-To Guides

  • 8-Output Octave Frequency Divider
  • Musical 4/4 Binary Rhythm Divider
  • Euclidean-Style Rhythmic Pattern Generator
  • Digital Phasor for Wavetable Scanning with Jena and Drezno
  • Stepped CV Glissando for VCO
  • Animate Odessa Harmonic Spectrum
  • Pseudo-Chaotic Sequence via Feedback
  • Differential Frequency Counter with Two Clocks
  • Leibniz Drum Pattern Generator with Jena
  • Audio Rate Sub-Octave Generator

Explore the interactive Erfurt panel on BleepDex — tap any control to learn what it does.

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