xaoc-devices-gera

XAOC Devices Gera

6 HP Eurorack module

Gera is a Leibniz Binary Subsystem processor that masks individual data bits with gate-controlled AND operations.

Features

  • Eight illuminated invert switches manually invert their corresponding gate inputs.
  • Hardware-based bit processing provides virtually no latency.
  • Standard Eurorack gates and square waveforms are recommended for the gate inputs.
  • Remember: Do not connect a power cable to the Leibniz headers; this can damage Gera and connected Leibniz modules.

Controls & Jacks (16)

  • Bit 7 Invert— Illuminated manual tact switch for the Bit 7 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 6 Invert— Illuminated manual tact switch for the Bit 6 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 0 Invert— Illuminated manual tact switch for the Bit 0 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 5 Invert— Illuminated manual tact switch for the Bit 5 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 5 Gate Input— Receives the gate controlling Leibniz data bit 5; a high gate passes the bit unless its corresponding toggle is inverted.
  • Bit 1 Invert— Illuminated manual tact switch for the Bit 1 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 4 Invert— Illuminated manual tact switch for the Bit 4 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 7 Gate Input— Receives the gate controlling Leibniz data bit 7, the most significant bit; a high gate passes the bit unless its corresponding toggle is in
  • Bit 6 Gate Input— Receives the gate controlling Leibniz data bit 6; a high gate passes the bit unless its corresponding toggle is inverted.
  • Bit 4 Gate Input— Receives the gate controlling Leibniz data bit 4; a high gate passes the bit unless its corresponding toggle is inverted.
  • Bit 2 Invert— Illuminated manual tact switch for the Bit 2 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 0 Gate Input— Receives the gate controlling Leibniz data bit 0; a high gate passes the bit unless its corresponding toggle is inverted.
  • Bit 1 Gate Input— Receives the gate controlling Leibniz data bit 1; a high gate passes the bit unless its corresponding toggle is inverted.
  • Bit 3 Invert— Illuminated manual tact switch for the Bit 3 AND-mask control; its red backlight indicates the resulting active gate state.
  • Bit 3 Gate Input— Receives the gate controlling Leibniz data bit 3; a high gate passes the bit unless its corresponding toggle is inverted.
  • Bit 2 Gate Input— Receives the gate controlling Leibniz data bit 2; a high gate passes the bit unless its corresponding toggle is inverted.

How-To Guides

  • Control a single bit mask

Explore the interactive Gera panel on BleepDex — tap any control to learn what it does.

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